1. Field of the Invention
The invention relates to a step waveform generator and in particular but not exclusively to a vertical timebase circuit for a raster-scanned cathode ray tube (CRT) incorporating such a circuit.
2. Description of the Prior Art
The advantages of a stepped vertical timebase for a CRT over the customary voltage ramp circuit are explained in the co-pending European Patent Application No. 82306865.5 (U.S. Ser. No. 537,776 filed 9/30/83). Briefly, when a CRT display employs voltage ramps to raster-scan the screen, problems arise due, for example, to variations in beam velocity during the scan, or variations in sync pulse frequency. Either of these irregularities can cause inconsistencies in scan line spacing over the face of the screen. For the same reasons inaccuracies are experienced when varying the display format for example to set a top margin for the display, or provide multiple line skips at selected locations on the screen. Furthermore, in interlaced displays variation in beam velocity or distortion of the ramp voltage by scan induced noise can cause the starting points for the interlaced field scans to be mispositioned leading to a visual phenomenon known as line pairing.
These problems are overcome by the use of a stepped voltage generator in place of the conventional ramp voltage generator. The output voltage level of the generator is increased by one step on receipt of each horizontal sync pulse and, provided the step height is accurately defined, the resulting line spacing is constant over the entire screen surface. Multiple line skips are accurately defined by controlling the generator to produce integral multiples of voltage steps as required. Finally, accurate interlace is achieved by providing a half step at the beginning of the stepped (or staircase) voltage waveform.
The stepped vertical timebase circuit described in the aforementioned European Patent Application includes a staircase generator which employs a so-called `cup and bucket` circuit to generate the stepped output voltage waveform. In this circuit the charge on a bucket capacitor is incrementally increased by the repetitive addition of small constant amounts of charge supplied from a cup capacitor. The cup capacitor is itself charged by a predetermined amount in response to receipt of each horizontal sync pulse. The value of the charge is determined by a voltage, derived from a reference voltage circuit, and connected across the capacitor each time the horizontal sync pulse is generated during the scanning operation. At the termination of each sync pulse, the cup capacitor is discharged into the bucket capacitor. An operational amplifier connected to the bucket capacitor stabilizes the voltage on the bucket capacitor. A reset circuit responsive to the vertical or field sync pulse periodically discharges the bucket capacitor to zero so that the process starts again on each new field scan.
A disadvantage with the circuit employed in the aforesaid European application is that portions of the circuit, for example the reference voltage circuit, are temperature dependent and although the circuit is regarded as being perfectly adequate for most applications, under certain conditions it may not produce voltage steps of sufficiently close tolerance to assure a picture of high enough quality. Furthermore, while line skip and interlace can be achieved with this circuit, in practice difficult tolerancing problems may be experienced.